At the pace every PC component is becoming quite expensive it's not entirely out of the realm of possibilities that my next CPU will be RISC-V based. /s (kind of)
PS: for those still hesitating to tinker with RISC-V the workflow is becoming quite convenient already, to the point you can "just" boot and install Linux (as mentioned in the article) on it to get a headless server running in minutes.
> to the point you can "just" boot and install Linux (as mentioned in the article) on it to get a headless server running in minutes.
This is basically what I've been waiting on. Besides the mentioned Milk-V Titan, what are some other good boards people here tried out and could vouch for being good? Ideally European, but happy to receive any recommendations as long as you've actually tried it yourself :)
As far as I know, there's still no real RISC-V equivalent to Raspberry Pi, and I think that's what early adopters want the most.
The closest thing is probably Orange Pi RV2, but it has an outdated SoC with no RVA23 support, meaning some Linux distros won't even run on it. Its performance is also much poorer than of the RPi5.
I'm not even sure it's just instruction support that's the problem with the RV2. I bought one since I thought it would be cool to write a bare metal os for it (especially after I found the AI results to be so bad.) But the lack of documentation has been making it very hard to get anything actually up and running. The best I've got is compiling their custom u-boot and linux repos, and even those come with some problems.
The board itself looks pretty spartan, at least compared to any other x86 ITX board I’ve seen in the last ten years. The only thing it doesn’t seem to have is audio jacks.
Is that because the platform itself is very lite, or is just typical for a dev ITX board?
Let's be honest - RISC-V doesn't make sense to 99% users at this stage. ARM is cheaper for 99% use cases, has far more choices on the market, much better performance, greater software ecosystem and tooling.
For 99% users, the only real "benefit" RISC-V can bring to the table is the _false_ feeling that "I am different". Before you start to be excited about those a few cents risc-v MCUs - there are much cheaper MCUs, consider those risc-v MCUs are dead expensive.
Thanks for reading my honest opinions, please feel free to downvote.
Some people care less about squeezing out performance and more about open standards. I like having more choices, especially open ones.
I am a user, I like to tinker, I'm fairly confident there's more than 1% of people who care about these things. If you live in a country that is threatened by export embargos and the like it also makes a lot of sense to prioritize open.
I have increasingly negative things to say about this.
There is (so far) nothing 'open' about RISC-V. and I wonder if there really ever was any desire for it, at this point.
This whole "Open ISA" crap appears to be a thin veneer to funnel quite large sums of investment into an otherwise completely proprietary and locked-down environment that could never harm the incumbents in any meaningful way - while still maintaining just enough of a pretense of open source, that the (regrettably myself included) shallow nerds and geeks could get smitten by it.
Where is the RTL? Where are the GDSII masks? Why am I unable to look at the branch predictor unit in the Github code viewer? Or (God forbid!) the USB/HDMI/GPU IP? I reject the notion that these are unreasonable questions.
I want my SoC to have a special register that has the git SHA ID of the exact snapshot of the repository that was used to cook the masks. that, now that - is Open Source. that is Open Computing. And nothing less!
I dont care about the piece of paper with instruction encodings - the least interesting part of any computer!
Wasn't that the whole point? We're more than a quarter of a century in and we're still begging SoC vendors for datasheets. Really incredibly embarassing and disappointing.
> Where is the RTL? Where are the GDSII masks? Why am I unable to look at the branch predictor unit in the Github code viewer? Or (God forbid!) the USB/HDMI/GPU IP? I reject the notion that these are unreasonable questions.
As you note correctly, the ISA is open, not this CPU (or board).
The important point is that using an open ISA allows you to create your own CPU that implements it. This CPU can then be open (i.e. you providing the RTL, etc.), if you so desire
I assume it will be much more difficult (or impossible?) to provide the RTL for a CPU with an AMD64 ISA, since that one has to be licensed. I wonder if you paying for the license allows you to share your implementation with the world. Even if it does, it's less likely that you will do so, given that you will have to pay for the licensing fee and make your money back
Since there is no license to pay for in case of RISC-V, it allows you to open up the design of your CPU without you having to pay for that privilege
Couldn't have said it better. The moments these people promise everything would be free is a massive red flag. Unfortunately it seems most poodle haven't learned the lesson.
PS: for those still hesitating to tinker with RISC-V the workflow is becoming quite convenient already, to the point you can "just" boot and install Linux (as mentioned in the article) on it to get a headless server running in minutes.
This is basically what I've been waiting on. Besides the mentioned Milk-V Titan, what are some other good boards people here tried out and could vouch for being good? Ideally European, but happy to receive any recommendations as long as you've actually tried it yourself :)
What a sad world to live in, stochastic bullshit machines and exploding drones get more computers than I
The closest thing is probably Orange Pi RV2, but it has an outdated SoC with no RVA23 support, meaning some Linux distros won't even run on it. Its performance is also much poorer than of the RPi5.
geekbench: https://browser.geekbench.com/v6/cpu/16145076
rvv-bench: https://camel-cdr.github.io/rvv-bench-results/spacemit_x100/...
There are also 8 additional SpacemiT-A100 cores with 1024-bit wide vectors, which are more like an additional accelerator for number crunshing.
The Milk-V Titan has slightly faster scalar performance, than the K3.
So the main difference between this Milk-V Titan and the upcoming SpacemiT K3 is that the latter has better vector performance?
I mean a board with decent storage and better performance.
Is that because the platform itself is very lite, or is just typical for a dev ITX board?
https://www.cnx-software.com/2026/01/12/milk-v-titan-a-329-o...
For 99% users, the only real "benefit" RISC-V can bring to the table is the _false_ feeling that "I am different". Before you start to be excited about those a few cents risc-v MCUs - there are much cheaper MCUs, consider those risc-v MCUs are dead expensive.
Thanks for reading my honest opinions, please feel free to downvote.
I am a user, I like to tinker, I'm fairly confident there's more than 1% of people who care about these things. If you live in a country that is threatened by export embargos and the like it also makes a lot of sense to prioritize open.
There is (so far) nothing 'open' about RISC-V. and I wonder if there really ever was any desire for it, at this point.
This whole "Open ISA" crap appears to be a thin veneer to funnel quite large sums of investment into an otherwise completely proprietary and locked-down environment that could never harm the incumbents in any meaningful way - while still maintaining just enough of a pretense of open source, that the (regrettably myself included) shallow nerds and geeks could get smitten by it.
Where is the RTL? Where are the GDSII masks? Why am I unable to look at the branch predictor unit in the Github code viewer? Or (God forbid!) the USB/HDMI/GPU IP? I reject the notion that these are unreasonable questions.
I want my SoC to have a special register that has the git SHA ID of the exact snapshot of the repository that was used to cook the masks. that, now that - is Open Source. that is Open Computing. And nothing less!
I dont care about the piece of paper with instruction encodings - the least interesting part of any computer!
Wasn't that the whole point? We're more than a quarter of a century in and we're still begging SoC vendors for datasheets. Really incredibly embarassing and disappointing.
As you note correctly, the ISA is open, not this CPU (or board).
The important point is that using an open ISA allows you to create your own CPU that implements it. This CPU can then be open (i.e. you providing the RTL, etc.), if you so desire
I assume it will be much more difficult (or impossible?) to provide the RTL for a CPU with an AMD64 ISA, since that one has to be licensed. I wonder if you paying for the license allows you to share your implementation with the world. Even if it does, it's less likely that you will do so, given that you will have to pay for the licensing fee and make your money back
Since there is no license to pay for in case of RISC-V, it allows you to open up the design of your CPU without you having to pay for that privilege
How is that feeling "false"? People running RISC-V systems are different, or at least they have different motivations than you.